Archive for the ‘Microprocessor’ Category

After one of my previous blog post about C++, I had to know the way how I can include my assembly code into my C++ file. I used to code with assembly for my graduation project in my college, mainly about Hypervisors. My first step was about to know the CPUID of the Microprocessor (I work on Intel Microprocessor). Then to see if the VMX is turned on or not.

I usually code C++ on Ubuntu and I had to code some basic things with the assembly, I faced a lot of problems that’s why I want to share it with you.

There are several ways to include them together:

  • The first one is to compile each file differentially and then link them together (I think this is the easiest way). Here is a link I found very nice explaining so.
  • The second way is to include the assembly code in your C++ code.
    • For coding on windows platform, will need you to define that this function or this instruction is done by the assembly code by just writing __asm { assembly code goes here } before the instruction. Like in this link
    • For coding on Linux platform, to include the assembly language in it, it will be a little different you have to write __asm__ volatile { assembly code goes here }

      PS: coding assembly on the Linux platform is a little strange, actually I am sure of the reason, I think it is related how the AT&T labs made it possible. For example for moving a values from registers to another you have to write down % before it. “movl %EAX, %EBX“.

So let’s get into a very simple code:

Mov eax, 10

Mov ebx 10

Add eax, ebx

 

And here is the C++ code and the assembly included in:

        __asm__ volatile{“movl $10, %eax;”

“movl $10, %EBX;”

“addl %ebx, %eax”}

 

One of the major problems I faced was this error: “operand number out of range”, that will be for the reason that each platform will require a different syntax to include your assembly in it. Please if you face any problem, please let me know so I can help you J

 

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After a number of recent blog posts about Virtualization in Intel Platform, here we will enter smoothly and explore the VMX operations and the CPUID. Here in this blog post, you will find all the details regarding what is related to the VMX Operation.

Now starting with the CPUID, it is taken from the CPU, it is main target is to define the ID of the processor and its capabilities. As in my blog post I am so interested about the Virtualization and Cloud Computing I will show you how to know if the current processor supports the VMX operations for allowing it to develop using the VMM and the Guest OS.

First of all let’s have a look on Instruction format that is passed to the processor to execute. The following picture is taken from the “64-ia32-architecture-software-developer-vol-2a-manual” for Intel.

I will not get in details what each thing in the instruction format do, maybe in late blog posts, but what I want to point out that you can know if the processor supports the VMX operation from the 5th bit. this is form the Intel Book “System software can determine whether a processor

supports VMX operation using CPUID. If CPUID.1:ECX.VMX[bit 5] = 1

I know and I am sure that all the coming Microprocessor will support the VMX operations because the coming windows of Microsoft the most dominant OS on earth for end users will have a Hypervisor.

 

 

VMX operation is the feature added to several Intel microprocessors that give them the capabilities to create Virtual Machine and creating the Hypervisors. Continuing on my latest post about Virtualization on Intel Platform, the VMX has two kinds of operations, one for the VMM (Virtual Machine Monitor) called the root operation and the second one is for the Guest Software called non-root operation. The root and the non-root operation are the way that the VMM and the Guest Software talk to each other.

There are some transitions made from the VMX root operations to the non-root operations called “VM Entries”, the other kind of transition from non-root operations to root operations called “VM Exits”.

So after defining everything like below, now I will explain everything in detail. The root operation is a set of instructions basically an addition of instructions added to the processor to allow him to execute and to accept these kind of instructions beside the normal instructions. The non-root operation’s main target is to facilitate the Virtualization.

Based on the latest Blog posts about Virtualization on Intel Microprocessor, and the VMM (Virtual Machine Monitor) the Hypervisor is the main component for the Virtualization. The Hypervisor most likely is called the VMM (Virtual Machine Manager), I think that this is the component that is managing the Virtual Machine Monitor of the processor to gain 3 main things:

  1. Equivalence, for executing the applications running on the guest OS as it is running on a normal PC
  2. Hardware Resource Control, this feature mainly prevents the guest OS from changing or accessing any kind of the configuration system
  3. Efficiency, that means that all the instructions of the guest OS must be executed simply and in an easy way without any interfering of the Hypervisor or the Virtual Machine Monitor.

Types of Hypervisor:

  • Bare metal Hypervisor

    The bare metal is the hypervisor that can control directly the Hardware resources and can easily manage the resources for different Guests that want to run their applications.

  • Hosted Hypervisor

     

    The hosted Hypervisor is a hosted hypervisor on an operating system that acts like an application that the operating systems executes its instructions.

Starting to build my own cloud from scratch, as I am Microsoft Student Partner, I will start by the platform Windows Azure built on, which is Intel Microprocessor. I will start by how the Virtualization is executed on the processor level. I am sure every developer, especially those who develop using C/C++ languages are familiar with what is the data structure and why are we using it in our application. For the virtual machines, there are some structures that you have to know about, Virtual Machine Control data Structure (VMCS), you won’t find the VMCS, and the processor must have the VMX extension to allow you as developer to be able to build VMs on it or play with its internals.

The VMX extensions allow you to build 2 kinds of VMs on the processor, the first called the VMM (Virtual Machine Monitor) and the second is the Guest OS. We can know from their names that the VMM is made for the full control of the infrastructure and the hardware platform; it acts as it is the host. The Guest VM acts like a stack for the guest OS and applications, it acts and executes normally as an application with no VMM using the shared resources. Just to point out that each VM runs independently than the other VMs sharing the same resources.

So how that works and what the VMM can do to the Guest application?

The main 2 transactions made between the VMM and the guest VM is when the guest VM starts or when it exits. When the VMM send the instruction VMLAUNCH or VMRESUME, it does something like releasing the guest VM and it regains back control on it when this guest VM exits.

for the Processor, each logical processor can handle only one VM at a time that doesn’t mean that It cannot support more than that but each VM has something called the launch state which defines which VM is active and which is inactive. For the actives one, the logical processor executes the VM with the current state.

 

 

 

When we go buying any new laptop these days we all hear about the cores, Intel core2 due, quad core … etc. Also for the computer developers they know about the cores and might heard about the threads, actually I am not talking about the threads in the development but on the processor threads.

The explanation is too easy; consider the number of the cores is the number of the physical processor that works in parallel way and the number of the threads as the number of the logical processor. The threads or the logical processor is used to elevate and to execute more instructions, we can consider that each thread execute a specific instruction, if the processor has 2 threads, it can executes 2 instructions in the same time.

Nowadays, the processor may have actually more than one physical processor and in each physical processor there might be a number of threads that share some of the components of this core, like for example the ALU, the execution engine. For the physical processors they might share some components like the bus interface that transfers the data and instructions from and to the memory.